Chip-Level Design for Digital Microfluidic Biochips

Chip-Level Design for Digital Microfluidic Biochips

Shang Tsung Yu, and Tsung Yi Ho

Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan, Taiwan

(Received 8 June 2014; Accepted 31 July 2014; Published on line 1 December 2014)
*Corresponding author: tyho@csie.ncku.edu.tw
DOI: 10.5875/ausmt.v4i4.770

Abstract: Recently, electrowetting-on-dielectric (EWOD) chips have become the most popular actuator for droplet-based digital microfluidic biochips (DMFBs) due to their high throughput, automatic control, and low cost. As the complexity of biochemical assays increase, powerful computer-aided-design (CAD) tools are needed. This paper provides an overview of DMFBs and describes some important issues and problems in the chip-level design of DMFBs.

Keywords: Computer Aided Design; Electrowetting; Microfluidics

Introduction

In recent years, digital microfluidic biochips (DMFBs) [1] have become state-of-the-art portable devices for implementing laboratory procedures in biochemistry. On a DMFB, a droplet of nano-liter volume can serve as a sample carrier and be manipulated as an operating unit. This approach offers advantages of high sensitivity, reduced bioassay consumption, and lower error probability [2]. The miniaturization in DMFB also reduces production costs and increases portability. By precisely controlling the movement of droplets, various applications such as immunoassays, DNA sequencing, polymerase chain reaction (PCR) and point-of-care disease diagnostics can be successfully realized [3].

Electrowetting-on-dielectric (EWOD) chips have emerged as the most widely used actuators particularly for DMFBs [4]. The general diagram of an EWOD chip is shown in Fig. 1. An EWOD chip consists of two parallel plates. The top plate is an electrode while the bottom plate comprises a two-dimensional (2D) array of electrodes. Under the bottom plate is a printed circuit board (PCB) where conduction wires are connected between electrodes and external electrical pads. The sample carriers (i.e., droplets) are sandwiched between the top plate and the bottom plate. By applying time-varying voltages to the electrodes through the external controller, droplets can be manipulated to perform operations such as transportation, mixing, and splitting [5]. EWODS also feature peripheral devices (e.g., dispensing port, optical detector) for dispensing the droplets from the reagent slots and detecting the bioassay outcome.

The increasing complexity of biochemical assays has increased the complexity of EWOD chips, requiring powerful computer-aided-design (CAD) tools to perform chip design tasks. With CAD tools, EWOD chips design can be automated, thus reducing costs and increasing productivity. Generally, EWOD chips are designed in two major stages, fluidic-level synthesis and chip-level design (Fig. 2). In fluidic-level synthesis, biochemical procedures are analyzed to determine an appropriate schedule of assay operations and the corresponding droplet behaviors. On the other hand, all the signals on each underlying electrode and the corresponding wire routing are decided in the chip-level design. Finally, the external controller is used to control all electrodes in executing the biological experiments. Recently, more attention has been paid to the high complexity of EWOD chip-level design. However, chip-level design involves overcoming many challenges, and inappropriate chip-level design can reduce chip reliability. Thus a well-designed CAD tool is needed to handle chip-level design of DMFBs. This paper mainly focuses on the chip-level CAD of DMFBs, describing the problems to be overcome and their solutions, and pointing out potential challenges in the future.

Chip-level Design

In this section, we describe the chip-level design consisting of electrode addressing and wire routing as shown in Fig. 2 (d)-(f), and the regarding problems.

Electrode Addressing

To be driven correctly, all electrodes should be addressed with control pins to receive control signals from the external controller. This is referred to as electrode addressing. In the electrode addressing scheme for conventional EWOD chips, each electrode is addressed with an independent control pin, referred to as direct addressing [6]. In the direct addressing scheme, all electrodes can be independently controlled. Thus this addressing scheme maximizes the flexibility of electrode controls.

Pin-constrained Broadcast Addressing

However, as chip size increases, it is necessary to limit the number of control pins since these pins are controlled by external controller with a limited number of signal ports. In such pin-constrained EWOD chips direct addressing cannot be used for electrode addressing. Instead, a widely used approach, broadcast addressing, is used [7]. Broadcast addressing uses the concept of pin sharing to assign a single control pin to multiple electrodes without affecting the execution of the assay. Thus, broadcast addressing can effectively reduce the number of control pins required.

When running a bioassay on an EWOD chip, a sequence of electrode actuation vectors is sent to the external controller to assigning the voltage to the electrodes. Each electrode is either being actuated or grounded at each time step. In an application-specified biochip, after finishing fluidic-level synthesis, each electrode has its own position and requires the droplets at each step to behave in an intended or anticipated manner. For example in Fig. 3, each electrode requires the droplet to move from left to the right in each time step. In Fig. 3, “0” represents that electrode should be grounded, while “1” represents that the electrode should be actuated, and “X” (don’t care term) represents that electrode could be grounded or actuated at the corresponding time step. An electrode actuation sequence ASi shows control signals of an Electrode ei at each time step. Each electrode actuation sequence may contain several don’t care terms because the droplets do not always go through or stay on the corresponding site. By carefully replacing these don’t care terms with “1” or “0”, multiple actuation sequences can be merged into an identical actuation sequence, which is also referred to as the common actuation sequence. In Fig. 3, Electrode e1, Electrode e2, and Electrode e5 can share a single control pin by merging the actuation sequences of e1, e2, and e5 to “00100”, and thus we can say e1, e2, and e5 are mutually compatible.

To determine compatibility between electrodes and conduct broadcast addressing, a compatibility graph is constructed. In the compatibility graph, each node stands for an electrode, and each edge between two nodes stands for the compatibility between two electrodes. If electrode ea and electrode eb are compatible, an edge is constructed between ea and eb. By checking each pair of the electrodes, the compatibility graph can be simply built. By observing the compatibility graph, broadcast addressing can be easily accomplished. An edge represents a compatible relationship. That is, a clique stands for an electrode group where all electrodes are mutually compatible and can be addressed to the same control pin. For example, Fig. 4 (a) lists each actuation sequence of each electrode, and Fig. 4 (b) presents the corresponding compatibility graph. Figure 5 (a) shows one of the possible electrode grouping results from Fig. 4, and Fig. 5 (b) shows the corresponding clique-partition of the compatibility graph. Broadcast addressing allows six electrodes to be addressed to three control pins. Thus, it is obvious that the broadcast addressing technique can be seen as finding a clique partition in the compatibility graph.

Therefore, by finding a minimum clique partition in the compatibility graph, the required number of control pins can be minimized. Nevertheless, the general minimum clique partition is known to be NP-hard, and thus requires considerable computation time, which previous studies [7-9] have attempted to minimize through using a heuristic algorithm.

Wire Routing

Wire routing is a critical step in the chip-level design of an EWOD chip. The conduction wires are routed from the bottom side of the electrode array, through the underlying substrate, to the surrounding electrical pads (external controller) so as to transmit the control signal of each control pin as shown in Fig. 6. The connections may be infeasible if the electrodes are not addressed carefully (i.e., there are no existing routes between the electrodes due blocked conduction wires). In this situation, extra processes or even additional routing layer(s) are needed, which is undesirable for low-cost EWOD chips fabrication. Thus, all electrodes should connect to the boundary without overlapping which is also known as escape routing. On the other hand, when the broadcast addressing technique is used to solve the pin-constrained problem, merged electrodes also need to be mutually connected to each other. Thus, all electrodes should be addressed carefully with simultaneous consideration to both escape routing and wire routing between electrodes sharing the same control pin. Several previous studies have proposed algorithms to implement escape routing and wire routing between electrodes. In [10], progressive addressing and routing is adopted. Specific electrodes are selected as initial pins, and then pin-electrode merging is done iteratively. When pin-electrodes merge, wire routing between the unaddressed electrode and the pin is done by a breadth-first search (BFS) based algorithm, and escape routing is checked by a classical approach which models the original routing problem into the maximum flow problem [11]. If the routing fails, the pin-electrode merging is dropped in favor of another pin-electrode merge in the next iteration. By this approach, the complexity of routing can be effectively decreased.

Challenging Problems

However, there the chip-level design of EWOD chips raises several problems.

Trapped Charge Problem

When an electrode is actuated by a high voltage, it may generate a trapped charge, where the charge is trapped in the chip’s electric insulating layer as shown in Fig. 7, reducing the electrowetting force [12]. This can cause erroneous execution results and even permanent dielectric breakdown [13]. If the applied voltage is too high, trapped charges will accumulate as the voltage increases. For the practical production of DMFBs, each operation prefers a specific driving voltage value which is dependent on the chip material (the material and the thickness of insulating layer, substrates, environment, etc), operations (dispensing, mixing, transporting, etc), and the reagent properties. If the applied voltage is lower than the operation’s preferred voltage, the operation may be conducted incorrectly, resulting in the faiure of the laboratory procedure. Thus, the voltage applied to the electrode must be higher than its preferred voltage. Direct addressing obviates this concern because each electrode can be driven independently and appropriately. However, if broadcast addressing is used, pin sharing may result in too high a voltage being applied to certain electrodes, resulting in a severe trapped charge problem. In [14] network flow based progressive addressing and routing are used to solve the trapped charge problem and the routing problem in the chip-level design.

Residual Charge Problem

Overly actuating an electrode (the electrode is continuously actuated for some time steps) substantially increases the amount of charge that accumulates in the actuated electrode. If the next electrode is actuated in term where the present electrode has a residual charge, the droplet may not be moved toward the next location as expected, which is referred to as the residual charge problem [9]. This inevitably impedes correct assay execution, thereby significantly degrading chip reliability. Similarly, if broadcast addressing is conducted inappropriately, pin sharing will cause some electrodes to become overly actuated as shown in Fig. 8, resulting in a sever trapped charge problem.

The work by [15] introduces the grounding vector, GV, indicating a control signal grounding all electrodes by additional one time step. That is, all operations are temporarily suspended by one time step for one GV insertion. By inserting GVs at some appropriate time steps, the residual charge problem can be relieved. The work also presented a matching-based broadcast-addressing algorithm for DMFBs to deal with the residual charge problem in pin-constrained chip-level design.

Contact Angle Reduction Problem

Because the droplet moves from one electrode to another adjacent electrode in each clock cycle, the completion time of many operations such as droplet transportation or dispensing are determined by the clock frequency applied to the EWOD chip. These fluid-handling operations are referred to as frequency-sensitive operations [16]. To minimize the time required to complete a bioassay, a high-frequency EWOD chip with a high clock frequency is needed. However, it has been reported that an electrode’s switching time count (i.e., the number of times an electrode is switched on and off) will cause the contact angle reduction problem [17], especially in high-frequency EWDO chip. Similarly, if broadcast addressing is conducted inappropriately, pin sharing will cause an increased switching time count in some electrodes as shown in Fig. 9(e), causing a severe trapped charge problem. The work by [16] presented a network flow-based progressive addressing and routing approach to overcome the contact angle reduction problem and complex wire routing problem.

All the aforementioned problems are serious issues with no existing solution. Reliability is an important requirement in DMFBs, especially for medical applications such as clinical diagnostics, immunoassays, and point-of-care testing, and low reliability will render assay results meaningless. However, it’s very difficult to simultaneously address the problems of reliability, pin-constraint, and wire routing, and more work is needed to overcome these issues in the design of DMFBs.

Conclusion

We present techniques for improving the chip-level design of digital microfluidic biochips (DMFBs) and provide a set of open problems and design challenges for future work. The presented findings should encourage the further development of CAD tools for DMFBs, paving the way for the deployment and use of biochips in emerging applications

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